1. Field of the Invention
The present invention relates to a semiconductor integrated circuit including a central processing unit (CPU), memories and a user programmable logic circuit mutually connected to one another through internal buses.
2. Description of the Prior Art
Conventionally, there has been known an application specified integrated circuit (hereinafter referred to as "ASIC") provided with a user logic section including a logic circuit programmed by a user to meet with a specified application or special purpose. To accomplish a higher level function, some of the ASICs incorporate CPU and memories therein. When it is designed so that the ASCI operates in accordance with a control signal issued from the CPU incorporated in the ASCI, operation of the user logic section cannot be achieved externally. This results in difficulty in testing the operations of the user logic section per se. Further, when there is a malfunction in such an ASIC, it has been difficult to know which component of the CPU, memories, user logic section is suffering from the malfunction.